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agilent hsdl-3602 irda ? data 1.4 compliant 4 mb/s 3v infrared transceiver data sheet features ? fully compliant to irda 1.1 specifications: 9.6 kb/s to 4 mb/s operation excellent nose-to-nose operation ? typical link distance > 1.5 m ? iec825-class 1 eye safe ? wide operating voltage range 2.7 v to 3.6 v ? small module size 4.0 x 12.2 x 4.9 mm (h x w x d) ? complete shutdown txd, rxd, pin diode ? low shutdown current 10 na typical ? adjustable optical power management adjustable led drive-current to maintain link integrity ? single rx data output fir select pin switch to fir ? integrated emi shield excellent noise immunity ? edge detection input prevents the led from long turn-on time ? interface to various super i/o and controller devices ? designed to accommodate light loss with cosmetic window ? only 2 external components are required description the hsdl-3602 is a low-height infrared transceiver module that provides interface between logic and ir signals for through-air, serial, half-duplex ir data link. the module is compliant to irda data physical layer specifica- tions 1.1 and iec825-class 1 eye safety standard. applications ? digital imaging digital still cameras photo-imaging printers ? data communication notebook computers desktop pcs win ce handheld products personal digital assistants (pdas) printers fax machines, photocopiers screen projectors auto pcs dongles set-top box ? telecommunication products cellular phones pagers ? small industrial and medical instrumentation general data collection devices patient and pharmaceutical data collection devices ? ir lans txd (9) md0 (4) md1 (5) rxd (8) fir_sel (3) gnd (7) agnd (2) v cc (1) r1 v cc sp hsdl-3602 cx1 cx2 leda (10) hsdl-3602 functional block diagram
2 i/o pins configuration table pin description symbol 1 supply voltage v cc 2 analog ground agnd 3 fir select fir_sel 4 mode 0 md0 5 mode 1 md1 6 no connection nc 7 ground gnd 8 receiver data output rxd 9 transmitter data output txd 10 led anode leda ordering information package option package part number standard package increment front view hsdl-3602-007 400 front view hsdl-3602-037 1800 the hsdl-3602 contains a high- speed and high-efficiency 870 nm led, a silicon pin diode, and an integrated circuit. the ic contains an led driver and a receiver providing a single output (rxd) for all data rates supported. the hsdl-3602 can be com- pletely shut down to achieve very low power consumption. in the shut down mode, the pin diode is inactive, thus producing very little photo-current even under very bright ambient light. the hsdl-3602 also incorporates the capability for adjustable optical power. with two programming pins; mode 0 and mode 1, the optical power output can be ad- justed lower when the nominal desired link distance is one-third or two-third of the full irda link. the hsdl-3602 comes with a front view packaging option (hsdl-3602-007/-037). it has an integrated shield that helps to ensure low emi emission and high immunity to emi field, thus enhancing reliable performance. application support information the application engineering group in agilent technologies is available to assist you with the technical understanding associ- ated with hsdl-3602 infrared transceiver module. you can contact them through your local agilent sales representatives for additional details. 87654321 9 10 back view (hsdl-3602-007/-037)
3 transceiver control truth table mode 0 mode 1 fir_sel rx function tx function 1 0 x shutdown shutdown 0 0 0 sir full distance power 0 1 0 sir 2/3 distance power 1 1 0 sir 1/3 distance power 0 0 1 mir/fir full distance power 0 1 1 mir/fir 2/3 distance power 1 1 1 mir/fir 1/3 distance power x = don't care recommended application circuit components component recommended value r1 2.2 w 5%, 0.5 watt, for 2.7 v cc 3.3 v operation 2.7 w 5%, 0.5 watt, for 3.0 v cc 3.6 v operation cx1 [5] 0.47 m f 20%, x7r ceramic cx2 [6] 6.8 m f 20%, tantalum notes: 5. cx1 must be placed within 0.7 cm of the hsdl-3602 to obtain optimum noise immunity. 6. in "hsdl-3602 functional block diagram" on page 3 it is assumed that vled and v cc share the same supply voltage and filter capacitors. in case the 2 pins are powered by different supplies cx2 is applicable for vled and cx1 for v cc . in environments with noisy power supplies, including cx2 on the v cc line can enhance supply rejection performance. transceiver i/o truth table inputs outputs transceiver mode fir_sel txd ei led rxd active x 1 x on not valid active 0 0 high [1] off low [3] active 1 0 high [2] off low [3] active x 0 low off high shutdown x x [4] low not valid not valid x = don't care ei = in-band infrared intensity at detector notes: 1. in-band ei 115.2 kb/s and fir_sel = 0. 2. in-band ei 3 0.576 mb/s and fir_sel = 1. 3. logic low is a pulsed response. the condition is maintained for duration dependent on the pattern and strength of the incident intensity. 4. to maintain low shutdown current, txd needs to be driven high or low and not left floating.
4 caution: the bicmos inherent to the design of this component increases the components suscepti- bility to damage from electrostatic discharge (esd). it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation, which may be induced by esd. marking information the hsdl-3602-007/-037 is marked '3602yyww' on the shield where 'yy' indicates the unit's manufactur- ing year, and 'ww' refers to the work week in which the unit is tested. absolute maximum ratings [7] parameter symbol minimum maximum unit conditions storage temperature t s C40 +100 ?c operating temperature t a C20 +70 ?c dc led current i led (dc) 165 ma peak led current i led (pk) 650 ma 90 m s pulse width, 25% duty cycle 750 ma 2 m s pulse width, 10% duty cycle led anode voltage v leda C0.5 7 v supply voltage v cc 07 v transmitter data input current i txd (dc) C12 12 ma receiver data output voltage v o C0.5 v cc + 0.5 v |i o (rxd)| = 20 m a note: 7. for implementations where case to ambient thermal resistance 50?c/w. iled (a) 0.7 leda voltage (v) 0.3 1.7 2.1 0 0.1 1.3 2.3 0.5 1.5 1.9 0.6 0.4 0.2 iled vs leda lop (mw/sr) 450 iled (a) 200 0.3 0.6 0 50 0 0.7 350 0.1 0.4 400 300 100 250 150 0.2 0.5 light output power (lop) vs iled
5 recommended operating conditions parameter symbol minimum maximum unit conditions operating temperature t a C20 +70 ?c supply voltage v cc 2.7 3.6 v logic high input voltage v ih 2 v cc /3 v cc v for txd, md0, md1, and fir_sel logic low transmitter v il 0v cc /3 v input voltage led (logic high) current i leda 400 650 ma pulse amplitude receiver signal rate 0.0024 4 mb/s electrical & optical specifications specifications hold over the recommended operating conditions unless otherwise noted. unspecified test conditions can be anywhere in their operating range. all typical values are at 25?c and 3.3 v unless otherwise noted. parameter symbol min. typ. max. units conditions transceiver supply current shutdown i cc1 10 200 na v sd 3 v cc C 0.5 idle i cc2 2.5 5 ma v i (txd) v il , ei = 0 digital input logic i l /i h C1 1 m a0 v i v cc current low/high transmitter transmitter logic high ei h 100 250 400 mw/sr v ih = 3.0 v radiant intensity i leda = 400 ma intensity q 1/2 15? peak l p 875 nm wavelength spectral line dl 1/2 35 nm half width viewing angle 2 q 1/2 30 60 optical tpw (ei) 1.5 1.6 1.8 m s tpw(txd) = 1.6 m s at 115.2 kb/s pulse width 148 217 260 ns tpw(txd) = 217 ns at 1.15 mb/s 115 125 135 ns tpw(txd) = 125 ns at 4.0 mb/s rise and t r (ei), 40 ns tpw(txd) = 125 ns at 4.0 mb/s fall times t f (ei) t r/f (txd) = 10 ns maximum tpw (max) 20 50 m s txd pin stuck high optical pulse width led anode on state voltage v on (leda) 2.4 v i leda = 400 ma, v i (txd) 3 v ih led anode off state leakage i lk (leda) 1 100 na v leda = v cc = 3.6 v, current v i (txd) v il ?
6 electrical & optical specifications specifications hold over the recommended operating conditions unless otherwise noted. unspecified test conditions can be anywhere in their operating range. all typical values are at 25?c and 3.3 v unless otherwise noted. parameter symbol min. typ. max. units conditions receiver receiver data logic low v ol 0 0.4 v i ol = 1.0 ma, output voltage ei 3 3.6 m w/cm 2 , q 1/2 15? logic high v oh v cc C 0.2 v cc vi oh = C20 m a, ei 0.3 m w/cm 2 , q 1/2 15? viewing 2 q 1/2 30 angle logic high receiver input ei h 0.0036 500 mw/cm 2 for in-band signals irradiance 115.2 kb/s [8] 0.0090 500 mw/cm 2 0.576 mb/s in-band signals 4 mb/s [8] logic low receiver input ei l 0.3 m w/cm 2 for in-band signals [8] irradiance receiver peak sensitivity l p 880 nm wavelength receiver sir pulse width tpw (sir) 1 4.0 m s q 1/2 15? [10] , c l = 10 pf receiver mir pulse width tpw (mir) 100 500 ns q 1/2 15? [11] , c l = 10 pf receiver fir pulse width tpw (fir) 85 165 ns q 1/2 15? [12] , c l = 10 pf, v cc = 3 to 3.6 v 190 ns q 1/2 15? [12] , c l = 10 pf, v cc = 2.7 v receiver ask pulse width tpw (ask) 1 m s 500 khz/50% duty cycle carrier ask [13] receiver latency time for fir t l (fir) 40 50 m s receiver latency time for sir t l (sir) 20 50 m s receiver rise/fall times t r/f (rxd) 25 ns receiver wake up time t w 100 m s [14] notes: 8. an in-band optical signal is a pulse/sequence where the peak wavelength, l p, is defined as 850 l p 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specification. 9. logic low is a pulsed response. the condition is maintained for duration dependent on pattern and strength of the incident intensity. 10. for in-band signals 115.2 kb/s where 3.6 m w/cm 2 ei 500 mw/cm 2 . 11. for in-band signals at 1.15 mb/s where 9.0 m w/cm 2 ei 500 mw/cm 2 . 12. for in-band signals of 125 ns pulse width, 4 mb/s, 4 ppm at recommended 400 ma drive current. 13. pulse width specified is the pulse width of the second 500 khz carrier pulse received in a data bit. the first 500 khz carrier pulse may exceed 2 m s in width, which will not affect correct demodulation of the data stream. an ask or dask system using the hsdl-3602 has been shown to correctly receive all data bits for 9 m w/cm 2 ei 500 mw/cm 2 incoming signal strength. ask or dask should use the fir channel enabled. 14. the wake up time is the time between the transition from a shutdown state to an active state, and the time when the receiver is active and ready to receive infrared signals. ?
7 txd "stuck on" protection rxd output waveform led optical waveform receiver wake up time definition (when md0 1 1 and md1 1 0) rx light t w rxd valid data t f led off 90% 50% 10% led on t pw t r t f v oh 90% 50% 10% v ol t pw t r t pw (max.) txd led
8 pin 1 mounting center 6.10 4.18 4.00 12.20 3.84 r 1.77 r 2.00 4.05 4.95 10 castellation: pitch 1.1 ?0.1 cumulative 9.90 ?0.1 0.70 0.80 1.70 pin 10 0.45 1.20 0.80 2.45 1.90 3.24 1.90 4.98 mid of land 1.05 2.40 2.35 2.84 2.08 0.70 0.43 pin 10 pin 1 mounting center top view front view land pattern back view side view all dimensions in millimeters (mm). dimension tolerance is 0.20 mm unless otherwise specified. 1.17 pin 1 pin 10 hsdl-3602-007 and hsdl-3602-037 package outline with dimension and recommended pc board pad layout
9 tape and reel dimensions (hsdl-3602-007, -037) all dimensions in millimeters (mm) r 1.00 2.00 ?0.50 label empty parts mounted leader empty (400 mm min.) (40 mm min.) direction of pulling (40 mm min.) configuration of tape 13.00 ?0.50 shape and dimensions of reels quantity = 400 pieces per reel (hsdl-3602-007) 1800 pieces per tape (hsdl-3602-037) 21.00 ?0.80 12.50 ?0.10 8.00 ?0.10 4.00 ?0.10 24.00 ?0.30 1.75 ?0.10 0.40 ?0.10 4.25 ?0.10 ? 1.55 ?0.05 11.50 ?0.10 2.00 ?0.10 b b 5?(max.) 5?(max.) 5.20 ?0.10 aa section a-a section b-b 10 3.8 a a ? 1.5 ?0.1 10 11 12 8 7 3 2 1 4 5 6 4.4 9 a a a
10 moisture proof packaging all hsdl-3602 options are shipped in moisture proof package. once opened, moisture absorption begins. baking conditions if the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. package temp. time in reels 60 c 3 48 hours in bulk 100 c 3 4 hours 125 c 3 2 hours 150 c 3 1 hour baking should be done only once. recommended storage conditions storage 10 c to 30 c temperature relative below 60% rh humidity time from unsealing to soldering after removal from the bag, the parts should be soldered within 3 days if stored at the recom- mended storage conditions. if times longer than 72 hours are needed, the parts must be stored in a dry box. units in a sealed moisture-proof package package is opened (unsealed) environment less than 30?, and less than 60% rh package is opened less than 72 hours perform recommended baking conditions no baking is necessary yes no no yes
11 reflow profile the reflow profile is a straight- line representation of a nominal temperature profile for a convec- tive reflow solder process. the temperature profile is divided into four process zones, each with different d t/ d time tempera- ture change rates. the d t/ d time rates are detailed in the following table. the temperatures are mea- sured at the component to printed circuit board connections. in process zone p1 , the pc board and hsdl-3602 castellation i/o pins are heated to a temperature of 125 c to activate the flux in the solder paste. the temperature ramp up rate, r1, is limited to 4 c per second to allow for even heating of both the pc board and hsdl-3602 castellation i/o pins. process zone p2 should be of sufficient time duration (> 60 seconds) to dry the solder paste. the temperature is raised to a level just below the liquidus point of the solder, usually 170 c (338 f). process zone p3 is the solder reflow zone. in zone p3, the temperature is quickly raised above the liquidus point of solder to 230 c (446 f) for optimum results. the dwell time above the liquidus point of solder should be between 15 and 90 seconds. it usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. beyond a dwell time 0 t-time (seconds) t ?temperature ?(?) 200 170 125 100 50 50 150 100 200 250 300 150 183 230 p1 heat up p2 solder paste dry p3 solder reflow p4 cool down 25 r1 r2 r3 r4 r5 90 sec. max. above 183? max. 245? maximum process zone symbol d t d t/ d time heat up p1, r1 25?c to 125?c 4?c/s solder paste dry p2, r2 125?c to 170?c 0.5?c/s solder reflow p3, r3 170?c to 230?c 4?c/s (245?c at 10 seconds max.) p3, r4 230?c to 170?c C4?c/s cool down p4, r5 170?c to 25?c C3?c/s of 90 seconds, the intermetallic growth within the solder connec- tions becomes excessive, resulting in the formation of weak and unreliable connections. the temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170 c (338 f), to allow the solder within the connections to freeze solid. process zone p4 is the cool down after solder freeze. the cool down rate, r5, from the liquidus point of the solder to 25 c (77 f) should not exceed -3 c per second maximum. this limitation is necessary to allow the pc board and hsdl-3602 castellation i/o pins to change dimensions evenly, putting minimal stresses on the hsdl-3602 transceiver.
12 dim. mm inches a 2.40 0.095 b 0.70 0.028 c (pitch) 1.10 0.043 d 2.35 0.093 e 2.80 0.110 f 3.13 0.123 g 4.31 0.170 appendix a: hsdl-3602-007/-037 smt assembly application note 1.0. solder pad, mask, and metal solder stencil aperture metal stencil for solder paste printing land pattern pcba stencil aperture solder mask figure 1. stencil and pcba. 1.1. recommended land pattern for hsdl-3602-007/-037 shield solder pad a b f theta 10x pad y d e g rx lens tx lens fiducial x c fiducial figure 2. top view of land pattern.
13 ? adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. there should be no other smd components within this area. ? h is the minimum solder resist strip width required to 1.2. adjacent land keep-out and solder mask areas dim. mm inches h min. 0.2 min. 0.008 j 13.4 0.528 k 4.7 0.185 l 3.2 0.126 h l rx lens tx lens j solder mask land k y avoid solder bridging adjacent pads. ? it is recommended that 2 fiducial cross be placed at mid-length of the pads for unit alignment. note : wet/liquid photo-imagineable solder resist/mask is recommended. figure 3. hsdl-3602-007/-037 pcba-adjacent land keep-out and solder mask.
14 figure 4. solder paste stencil aperture. see figure 4 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.152 0.006 2.8 0.05 0.110 0.002 0.127 0.005 3.4 0.05 0.134 0.002 w, the width of aperture is fixed at 0.70 mm (0.028 inches) aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimension. 2.0. recommended solder paste/ cream volume for castellation joints based on calculation and experi- ment, the printed solder paste volume required per castellation pad is 0.30 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume). 2.1. recommended metal solder stencil aperture it is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. this is to ensure ad- equate printed solder paste vol- ume and no shorting. the following combination of metal stencil aperture and metal stencil thickness should be used: 3.0. pick and place misalignment tolerance and product self-align- ment after solder reflow if the printed solder paste volume is adequate, the unit will self- align in the x-direction after sol- der reflow. units should be properly reflowed in ir hot air convection oven using the recom- mended reflow profile. the di- rection of board travel does not matter. aperture as per land solder paste l w t (stencil thickness) allowable misalignment tolerance x-direction 0.2 mm (0.008 inches) theta-direction 2 degrees
15 3.1. tolerance for x-axis alignment of castellation misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during placement of the unit. the castellations will completely self-align to the pads during solder reflow as seen in the pictures below. 3.2. tolerance for rotational (theta) misalignment units when mounted should not be rotated more than 2 degrees with reference to center x-y as specified in figure 2. pictures 3 and 4 show units before and after reflow. units with a theta misalignment of more than 2 degrees do not completely self-align after reflow. units with 2 degree rotational or theta misalignment self-aligned completely after solder reflow. picture 1. castellation misaligned to land pads in x-axis before reflow. picture 2. castellation self-align to land pads after reflow. picture 3. unit is rotated before reflow. picture 4. unit self-aligns after reflow.
16 4.0. solder volume evaluation and calculation geometery of an hsdl-3602-007/-037 solder fillet. 0.8 1.2 0.70 0.45 0.20 0.7 0.4 3.3. y-axis misalignment of castellation in the y-direction, the unit does not self-align after solder reflow. it is recommended that the unit be placed in line with the fiducial mark (mid-length of land pad). this will enable sufficient land length (minimum of 1 / 2 land length) to form a good joint. see figure 5. 3.4. example of good hsdl-3602-007/ -037 castellation solder joints this joint is formed when the printed solder paste volume is adequate, i.e., 0.30 cubic mm and reflowed properly. it should be reflowed in ir hot-air convection reflow oven. direction of board travel does not matter. minimum 1/2 the length of the land pad lens edge fiducial y figure 5. section of a castellation in y-axis. picture 5. good solder joint.
17 appendix b: general application guide for the hsdl-3602 infrared irda ? compliant 4 mb/s transceiver description the hsdl-3602 wide voltage operating range infrared trans- ceiver is a low-cost and small form factor that is designed to address the mobile computing market such as notebooks, print- ers and lan access as well as small embedded mobile products such as digital cameras, cellular phones, and pdas. it is fully com- pliant to irda 1.1 specification up to 4 mb/s, and supports hp- sir, sharp ask, and tv remote modes. the design of the hsdl- 3602 also includes the following unique features: ? low passive component count. ? adjustable optical power man- agement (full, 2/3, 1/3 power). ? shutdown mode for low power consumption requirement. ? single-receive output for all data rates. adjustable optical power management the hsdl-3602 transmitter of- fers user-adjustable optical power levels. the use of two logic-level mode-select input pins, mode 0 and mode 1, offers shutdown mode as well as three transmit power levels as shown in the fol- lowing table. the power levels are setup to correspond nomi- nally to maximum, two-third, and one-third of the transmission distance. this unique feature allows lower optical power to be transmitted at shorter link dis- tances to reduce power consump- tion. mode mode 1 transmitter 1 0 shutdown 0 0 full power 0 1 2/3 power 1 1 1/3 power selection of resistor r1 resistor r1 should be selected to provide the appropriate peak pulse led current over different ranges of vcc. the recommended r1 for the voltage range of 2.7 v to 3.3 v is 2.2 w while for 3.0 v to 3.6 v is 2.7 w . the hsdl-3602 typically provides 250 mw/sr of intensity at the recommended minimum peak pulse led current of 400 ma. interface to recommended i/o chips the hsdl-3602s txd data input is buffered to allow for cmos drive levels. no peaking circuit or capacitor is required. data rate from 9.6 kb/s up to 4 mb/s is available at the rxd pin. the fir_sel pin selects the data rate that is receivable through rxd. data rates up to 115.2 kb/s can be received if fir_sel is set to logic low. data rates up to 4 mb/s can be received if fir_sel is set to logic high. software driver is necessary to program the fir_sel to low or high at a given data rate. 4 mb/s ir link distance of greater than 1.5 meters have been demonstrated using typical hsdl-3602 units with national semiconductors pc87109 3 v endec and super i/os, and the smc super i/o chips. there are 2 basic means to adjust the optical power of the hsdl-3602: dynamic: this implementation enables the transceiver pair to adjust their transmitter power according to the link distance. however, this requires the irda protocol stack (mainly the irlap layer) to be modified. please con- tact agilent application group for further details. static: pre-program the rom bios of the system (e.g. note- book pc, digital camera, cell phones, or pda) to allow the end user to select the desired optical power during the system setup stage.
18 irtx irrx1 irsl0 pc97/87338vjg 63 65 66 pc87308vul 81 80 79 pc87108avhg 39 38 37 pc87109vbe 15 16 14 please refer to the national semiconductor data sheets and application notes for updated information. (a) national semiconductor super i/o and infrared controller for national semiconductor super i/o and infrared controller chips, ir link can be realized with the following connections: ? connect irtx of the national super i/o or ir controller to txd (pin 9) of the hsdl-3602. ? connect irrx1 of the national super i/o or ir controller to rxd (pin 8) of the hsdl-3602. ? connect irsl0 of the national super i/o or ir controller to fir_sel (pin 3) of the hsdl- 3602. please refer to the table below for the ir pin assignments for the national super i/o and ir con- trollers that support irda 1.1 up to 4 mb/s: txd (9) md0 (4) md1 (5) rxd (8) fir_sel (3) gnd (7) agnd (2) v cc (1) leda (10) r1 v cc sp hsdl-3602 cx1 cx2 national semiconductor super i/o or ir controller irtx irrx1 irsl0 * * * mode ground for full power operation
19 ( b) hsdl-3602 interoperability with national semiconductor pc97338vjg sio evaluation report introduction the objective of this report is to demonstrate the interoperability of the hsdl-3602 ir transceiver ir module as wireless communi- cation ports at the speed of 2.4 kb/s - 4 mb/s with nss pc97338vjg super i/o under typical operating conditions. test procedures (1) two pc97338vjg evalua- tion boards were connected to the isa bus of two pcs (pentium 200 mhz) running txd (9) md0 (4) md1 (5) rxd (8) fir_sel (3) gnd (7) agnd (2) v cc (1) leda (10) r1 v cc sp hsdl-3602 cx1 cx2 national semiconductor pc97338vjg super i/o irtx (63) irrx1 (65) irsl0 (66) * * * mode ground for full power operation a0 - a3 rd, wr, cs d0 - d7 drq dack, tc irq system bus hsdl 3602 14.314 mhz clock microsofts dos operating system. one system with an hsdl-3602 ir transceiver connected to the pc97338vjg evaluation board will act as the master device. another system with an hsdl-3602 ir trans- ceiver connected to the pc97338vjg will act as the slave device (i.e. device under test). (2) the test software used in this interoperability test is provided by national semi- conductor. a file size of 1.7m byte from the master device, with the pc97338vjg performing the framing, encoding is transmitted to the slave device. the slave device, with the pc97338vjg per- forming the decoding, and crc checksum, will receive the file. the file is then checked for error by com- paring the received file with the original file using the dos fc command. (3) the link distance is mea- sured by adjusting the dis- tance between the master and slave for errorless data communications. hsdl-3602 interoperability with ns pc97338 report (i) test conditions v cc = 3.0 C 3.6 v rled = 2.7 w optical transmitter pulse width = 125 ns mode set to full power (ii) test result the interoperability test results show that hsdl-3602 ir trans- ceiver can operate 3 1.5 meter link distance from 3 v to 3.6 v with nss pc97338 at any irda 1.1 data rate without error.
20 hsdl-3602 interoperability with smc's super i/o or ir controller txd (9) md0 md1 rxd (8) fir_sel (3) gnd (7) agnd (2) v cc (1) leda (10) r1 v cc sp hsdl-3602 cx1 cx2 4 5 standard microsystem corporation super i/o or ir controller irrx irmode irtx mode ground for full power operation (c) standard micro system corporation (smc) super and ultra i/o controllers for smc super and ultra i/o controller chips, ir link can be realized with the following con- nections: ? connect irtx of the smc super or ultra i/o controller to txd (pin 9) of the hsdl-3602. irtx irrx irmode FDC37C669FR 89 88 23 fdc37n769 87 86 21 fdc37c957/8fr 204 203 145 or 190 ? connect irrx of the smc super or ultra i/o controller to rxd (pin 8) of the hsdl-3602. ? connect irmode of the super or ultra i/o controller to fir_sel (pin 3) of the hsdl-3602. please refer to the table below for the ir pin assignments for the smc super or ultra i/o controllers that support irda 1.1 up to 4mb/s: hsdl-3602 interoperability with smc 669/769 report (i) test conditions vcc = 3.0 C 3.6 v rled = 2.2 w optical transmitter pulse width = 125 ns mode set to full power (ii) test result the interoperability test results show that hsdl-3602 ir transceiver can operate 3 1.5 meter link distance from 3 v to 3.6 v with smc 669/769 at any irda 1.1 data rate without error.
21 to ensure irda compliance, some constraints on the height and width of the window exist. the minimum dimensions ensure that the irda cone angles are met without vignetting. the maximum dimensions minimize the effects of stray light. the minimum size corresponds to a cone angle of 30 0 and the maximum size corre- sponds to a cone angle of 60 o . in the figure below, x is the width of the window, y is the height of the window and z is the distance from the hsdl-3602 to the back of the window. the dis- tance from the center of the led lens to the center of the photo- diode lens, k, is 7.08mm. the equations for computing the win- dow dimensions are as follows: x = k + 2*(z+d)*tana y = 2*(z+d)*tana the above equations assume that the thickness of the window is negligible compared to the dis- tance of the module from the back of the window (z). if they are com- parable, z' replaces z in the above equation. z' is defined as z'=z+t/n where t is the thickness of the window and n is the refractive index of the window material. the depth of the led image in- side the hsdl-3602, d, is 8mm. a is the required half angle for viewing. for irda compliance, the minimum is 15 0 and the maximum is 30 0 . assuming the thickness of the window to be negligible, the equations result in the following tables and graphs: d z k a ir transparent window opaque material opaque material ir transparent window x appendix c: optical port dimensions for hsdl-3602:
22 aperture width aperture height (x, mm) (y, mm) module depth, (z) mm max. min. max. min. 0 16.318 11.367 9.238 4.287 1 17.472 11.903 10.392 4.823 2 18.627 12.439 11.547 5.359 3 19.782 12.975 12.702 5.895 4 20.936 13.511 13.856 6.431 5 22.091 14.047 15.011 6.967 6 23.246 14.583 16.166 7.503 7 24.401 15.118 17.321 8.038 8 25.555 15.654 18.475 8.574 9 26.710 16.190 19.630 9.110 aperture width (x) ?mm 30 module depth (z) ?mm 10 47 0 5 09 15 26 20 x max. x min. 25 135 8 aperture width (x) vs module depth aperture height (y) ?mm module depth (z) ?mm 10 47 0 5 09 15 26 20 y max. y min. 25 135 8 aperture height (y) vs module depth
23 window material almost any plastic material will work as a window material. polycarbonate is recommended. the surface finish of the plastic should be smooth, without any texture. an ir filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10 percent or less for best optical performance. light loss should be measured at 875 nm. shape of the window from an optics standpoint, the window should be flat. this flat window (first choice) ensures that the window will not alter either the radiation pattern of the led, or the receive pattern of the photodiode. if the window must be curved for mechanical or industrial design reasons, place the same curve on the back side of the window that has an identical radius as the front side. while this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. the amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. the following drawings show the effects of a curved window on the radiation pattern. in all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. curved front and back (second choice) curved front, flat back (do not use)
www.agilent.com/semiconductors for product information and a complete list of distributors, please go to our web site. for technical assistance call: americas/canada: +1 (800) 235-0312 or (408) 654-8675 europe: +49 (0) 6441 92460 china: 10800 650 0017 hong kong: (+65) 6271 2451 india, australia, new zealand: (+65) 6271 2394 japan: (+81 3) 3335-8152(domestic/interna- tional), or 0120-61-1280(domestic only) korea: (+65) 6271 2194 malaysia, singapore: (+65) 6271 2054 taiwan: (+65) 6271 2654 data subject to change. copyright ? 2002 agilent technologies, inc. obsoletes 5988-5836en december 3, 2002 5988-8422en

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